The FPGA Engineer (Campus recruitment)

Shenzhen No limit No limit 2 people



Image Display Technology Laboratory



Job Description


1. Responsible for FPGA control scheme design of video processing system and FPGA control circuit design;


2. Write FPGA control code and debugging system program;


3. Follow the code specification, complete the assigned development tasks in time, and ensure the development progress of the project;


4. Responsible for code optimization, maintenance and new technology research of product modules;


5. Responsible for writing and organizing technical documents related to the development process.





9-10F, High-Tech Zone Union Tower, No.63, Xuefu Road, Nanshan District, Shenzhen, Guangdong, China

Shenzhen AOTO Electronics Co., Ltd.

Contact: Mr. Chen


Tel: 0755-26719896